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The Concurrency Representation in TLA+ Specification (CROSBI ID 640608)

Prilog sa skupa u zborniku | izvorni znanstveni rad | međunarodna recenzija

Viktorovych Shkarupylo, Vadym ; Tomičić, Igor ; Viacheslavovych Arapin, Dmytro The Concurrency Representation in TLA+ Specification // Proceedings of the VIIIth International scientific-practical conf. on Modern problems and achievements of radio engineering (electronics), telecommunications and information technology. Zaporižja, 2016. str. 118-119

Podaci o odgovornosti

Viktorovych Shkarupylo, Vadym ; Tomičić, Igor ; Viacheslavovych Arapin, Dmytro

engleski

The Concurrency Representation in TLA+ Specification

The work is aimed at the estimation of memory requirements depending on the complexity of model checking tasks to be solved. For this purpose the concurrency is represented in formal TLA+ specification on its lowest abstraction layer – as an interleaving.

concurrency ; model checking ; TLA+ ; formalisms ; temporal logic of actions

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Podaci o prilogu

118-119.

2016.

objavljeno

Podaci o matičnoj publikaciji

Proceedings of the VIIIth International scientific-practical conf. on Modern problems and achievements of radio engineering (electronics), telecommunications and information technology

Zaporižja:

978-617-529-152-8

Podaci o skupu

International scientific-practical conf. on Modern problems and achievements of radio engineering (electronics), telecommunications and information technology

ostalo

21.09.2016-23.09.2016

Zaporizhzhya, Ukrajina

Povezanost rada

Računarstvo