engleski

Inductive Influences in VLSI Interconnect

Interconnect inductance is becoming more significant in modern VLSI interconnect. The test structure was designed to determine the impact of inductance on signal delay and crosstalk and to examine the difference between RC model and full RLC model. Several test simulations were performed to determine the worst-case signal input combinations for the RLC model.

interconnect; inductance; delay; crosstalk

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