engleski

Vertical Silicon-on-Nothing FET: Subthreshold Slope Calculation Using Compact Capacitance Model

The subthreshold slope model of the Vertical Silicon-on-Nothing FET, extracted from the compact capacitance model, has been developed. For short-channel effects modeling the voltage-doping transformation is used. The analytical model is verified by comparison to the two-dimensional numerical device simulator, MEDICI, over a wide range of different device structures. Good agreement is obtained for channel lengths down to 50 nm.

Silicon-on-Nothing ; fully-depleted MOSFET ; vertical SONFET ; subthreshold slope ; compact model

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