engleski

Development of I2C Bus Driver

A typical embedded system encompasses logic design, processors, and access to the peripheral devices. In the embedded systems design usage of Field Programmable Gate Arrays (FPGAs) allows a system designer to customize both processor and digital logic to the specific needs of a target application. Usually, it also requires appropriate access to the peripheral devices. One of the approaches to access peripheral devices is the usage of the I2C bus which is currently the industry de-facto standard for low-speed IC-to-IC communication. The I2C bus is a simple two wire serial bidirectional bus supported by wide range of peripheral devices such as memories, A/D and D/A converters, real-time clocks, video drivers, and microprocessor. In this paper, we present comparison of different I2C bus implementations approaches as IP-cores using FPGA: an open-source core written in VHDL, PicoBlaze soft microcontroller core, and proprietary IP core component. We have analyzed features and implementation issues such as area and timing performance on different FPGA architectures.

I2C Bus; FPGA; HDL; Soft-Core Processor; PicoBlaze

nije evidentirano