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izvor podataka: crosbi

Design and implementation of a hardware-in-the-loop simulator for a semi-automatic guided missile system (CROSBI ID 89107)

Prilog u časopisu | izvorni znanstveni rad | međunarodna recenzija

Ćosić, Krešimir ; Kopriva, Ivica ; Kostić, Todor ; Slamić, Miroslav ; Volarević, Marijo Design and implementation of a hardware-in-the-loop simulator for a semi-automatic guided missile system // Simulation practice and theory, 7 (1999), 2; 107-123-x

Podaci o odgovornosti

Ćosić, Krešimir ; Kopriva, Ivica ; Kostić, Todor ; Slamić, Miroslav ; Volarević, Marijo

engleski

Design and implementation of a hardware-in-the-loop simulator for a semi-automatic guided missile system

Hardware in the loop (HIL) simulation based on modern digital signal processors is a cost-effective technology for the design and evaluation of various sophisticated weapon and industrial systems. The semi-automatic command to line of sight (SACLOS) missile system is one example of a complex weapon system for which modernisation is a very complex process.The presented HIL simulation examples illustrate the essential importance of HIL simulation technology for cost-effective, non-destructive prototype development of such SACLOS systems. The Importance of the simulation kernel consisting of 4 TMS320C40 digital signal processors for efficient real-time simulation of the implemented SACLOS subsystem models is also emphasised in this paper.

Hardware in the loop simulation; semi-automatic guided missile systme; Digital signal processors; Parallel processing;

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Podaci o izdanju

7 (2)

1999.

107-123-x

objavljeno

0928-4869

Povezanost rada

Elektrotehnika

Indeksiranost