engleski

Experience in Designing a Large-scale Multiprocessor using Field-Programming Devices and Advanced CAD Tolls

This paper provides a case study that shows how a demanding application stresses the capabilities of today’s CAD tools, especially in the integration of products from multiple vendors. We relate our experiance in the design of a large, high-speed multiprocessor computer, using state of the art CAD tolls. All logic circuitry is target to field-programmable devices (FPDs). This choice amplifies the difficulties associated with achieving a high-speed design, and places extra requirements on the CAD tools. Two main CAD systems are discussed in the paper: Cadence Logic Workbench (LWB) is employed for board-level design, and Altera MAX+plusII is used for implementation of logic circuits in FPDs. Each of these products is of great value for our project, but the integration of the two is less than satisfactory. The paper describes a custom procedure that we developed for integration sub-designs realized in FPDs (via MAX+plusII) into our board-level designs in LWB. We also discuss experiance with Logic Modelling Smart Models, for simulation of FPDs and other types of chips.

Field-programming devices; advanced CAD tolls; large-scale multiprocessor

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